【學(xué)術(shù)講座】：On AI3.0 Internal LearningParadigm for Advanced Deep
報(bào)告題目： On AI3.0 Internal Learning Paradigm for Advanced Deep Learning/Compression
主講嘉賓： Prof. S.Y. Kung, Dept. EE, Princeton University, USA
邀請(qǐng)人 ： 陳佳義 博士
講座時(shí)間：2019年4月8日（周一）上午10：30
講座地點(diǎn)：深圳大學(xué)南校區(qū)基礎(chǔ)實(shí)驗(yàn)樓北座信息工程學(xué)院N605會(huì)議室
報(bào)告摘要:
Back-propagation (BP) is known to be an external learning paradigm since it receives its supervision via the external (i.e. input/output) interfacing nodes of a neural net (NN). Consequently, the BP-based Deep Learning (NN/AI 2.0) has been applied to the training of NN’s parameters exclusively, leaving the question of finding optimal structure to merely trial and error. Arguably, structural training has to be a most vital task facing our next-generation NN/AI technology. To this end, we propose an internal learning paradigm to facilitate direct evaluation/learning of hidden nodes by means of (1) internal teacher labels (ITL); and (2) internal optimization metrics (IOM). Subsequently, via external/internal hybrid learning, we propose a parameter/structure training scheme of optimal Deep Learning/Compression Nets. In our comparative studies, the hybrid learning methodology appears to show both reduced nets and better accuracy at the same time. In fact, it consistently outperforms the existing AI2.0 deep learning/compression techniques. It is important to note that, the internal learning paradigm is, conceptually at least, one step beyond the notion of Internal Neuron's Explainablility, championed by DARPA's XAI (or NN/AI3.0).
嘉賓簡(jiǎn)介：
S.Y. Kung (kung@princeton.edu) is a professor in the Department of Electrical Engineering at Princeton University, New Jersey. His research areas include machine learning, compressive privacy, data mining and analysis, statistical estimation, system identification, wireless communication, very-large-scale integration (VLSI) array processors, genomic signal processing, and multimedia information processing. He was a founding member of several technical committees of the IEEE Signal Processing Society. He served as a member of the Board of Governors of the IEEE Signal Processing Society (1989–1991). He has been the editor-in-chief of Journal of VLSI Signal Processing Systems since 1990. He has received multiple awards and recognitions. He is a Life Fellow of the IEEE.
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